About the Job
Meta is hiring an ASIC Engineer, Design to work on advanced ASICs for areas such as machine learning, video transcoding and network acceleration. The role is part of Meta's Infrastructure organisation, which builds the data centres supporting services such as Facebook, Instagram and WhatsApp.
As an ASIC Engineer, you will work with the ASIC team on hardware accelerators for important workloads. The role includes working with engineers across areas like AI/ML and video technologies to evaluate algorithms, develop models and help build hardware accelerator ASICs.
The work involves micro-architecture, RTL or HLS development, verification and PPA optimisation. You may also work on verification coverage, simulation acceleration and post-silicon validation.
This opportunity can be suitable for candidates who have a strong foundation in computer architecture, logic design, RTL development and ASIC design and want to work on hardware accelerators at a large technology company.
Job Overview
Eligibility Criteria
- Candidates should currently have, or be in the process of obtaining, a Bachelor's degree in Computer Science, Computer Engineering, Electronics Engineering, a relevant technical field or equivalent practical experience.
- The degree must be completed before joining Meta.
- Exposure to micro-architecture development is required.
- Exposure to RTL development using Verilog, SystemVerilog or HLS is required.
- Should have knowledge of Computer Architecture and Logic Design fundamentals.
- Candidates must obtain and maintain the required work authorization in the country of employment.
- A Master's degree in Electrical Engineering, Computer Engineering or a related engineering field is preferred but not mandatory.
Key Responsibilities
- Participate in micro-architecture, design and verification reviews and provide technical feedback.
- Design and develop RTL or HLS code for different IP blocks.
- Analyse hardware designs and improve Power, Performance and Area (PPA).
- Support and develop verification infrastructure.
- Analyse and improve verification coverage.
- Support simulation accelerators and post-silicon validation activities.
- Work with ASIC teams developing hardware accelerators for workloads such as machine learning, video transcoding and network acceleration.
- Contribute to evaluating algorithms, developing functional and performance models and architecting hardware accelerator ASICs.
Skills Required
- RTL Development: Exposure to RTL development using Verilog, SystemVerilog or HLS.
- Micro-architecture: Understanding and exposure to micro-architecture development.
- Computer Architecture: Strong fundamentals of computer architecture and digital logic design.
- ASIC Design: Understanding of ASIC design, hardware accelerators and IP development.
- Verification: Knowledge of verification infrastructure and verification coverage.
- PPA Optimisation: Ability to analyse designs and improve Power, Performance and Area.
- Hardware Modelling: Exposure to functional and performance modelling is useful for accelerator development.
- Programming / Scripting: Python or Perl scripting capability is preferred.
Preferred Skills
| High Performance Computing | Experience with HPC environments and workloads |
| Design Verification | Lint, CDC and verification-related experience |
| Synthesis | Understanding of synthesis and hardware implementation |
| Power Optimisation | Experience optimising hardware designs for power |
| Data Path Development | Experience developing hardware data paths |
| HLS | Experience with High-Level Synthesis |
| Scripting | Python or Perl scripting |
Benefits
- The role provides an opportunity to work on advanced ASICs and hardware accelerators for workloads including machine learning, video transcoding and network acceleration.
- Engineers can work alongside experts in areas such as AI/ML, video technologies and hardware acceleration.
- The role offers exposure to the development of hardware used in Meta's large-scale infrastructure and data centres.
- Candidates can gain experience across micro-architecture, RTL/HLS development, verification, PPA optimisation and post-silicon validation.
- The position provides an opportunity to work on accelerator designs focused on efficient data-centre operation.
Who Can Apply?
- Students currently pursuing a Bachelor's degree in Computer Science, Computer Engineering, Electronics Engineering or a relevant technical field can apply.
- Candidates whose Bachelor's degree is in progress can apply, provided the degree is completed before joining Meta.
- Candidates with equivalent practical experience may also be considered.
- Applicants should have exposure to micro-architecture development.
- Applicants should have exposure to RTL development using Verilog, SystemVerilog or HLS.
- Strong fundamentals in Computer Architecture and Logic Design are required.
- A Master's degree in Electrical Engineering, Computer Engineering or a related field is a preferred qualification, not a mandatory requirement.
- Experience with HPC, data-path development, HLS, synthesis, Lint, CDC, power optimisation or Python/Perl scripting can strengthen the profile.
How to Apply
For an ASIC design role, clearly mention the hardware projects you have actually worked on. Include the RTL language used, the architecture you designed, verification work performed and any PPA, synthesis or FPGA/ASIC experience you have.
Before You Apply
- The information in this post is based on the job details provided by Meta.
- The role is listed as ASIC Engineer, Design.
- The provided job description does not mention a specific number of years of experience.
- The position requires a Bachelor's degree in Computer Science, Computer Engineering, Electronics Engineering, a relevant technical field or equivalent practical experience.
- Candidates currently pursuing a Bachelor's degree must complete the degree before joining Meta.
- A Master's degree is listed as a preferred qualification, not a mandatory requirement.
- The provided job description does not mention an exact salary amount, so no salary estimate has been added.
- Relevant technical exposure includes micro-architecture, RTL development, Verilog, SystemVerilog, HLS, computer architecture and logic design.
- Preferred experience includes HPC, Lint, CDC, synthesis, power optimisation, data-path development, HLS and Python or Perl scripting.
- Meta requires candidates to obtain and maintain work authorization in the country of employment.
- TechJobsAlert does not charge candidates any fee for applying and is not involved in Meta's hiring or selection process.
- We do not guarantee interview calls, selection or a job offer.
- Before applying, check the latest information on the official Meta Careers page and confirm that you meet the current requirements.
